m255
K4
z2
!s11f vlog 2020.1 2020.02, Feb 28 2020
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
Z0 dC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/ModelSim
vactive_block
Z1 !s110 1640310440
!i10b 1
!s100 [_aU1OT>34GAn8[Re1E;Z0
Z2 !s11b Dg1SIo80bB@j0V0VzS_@n1
IKJc9]QH]N]QjOS7QoGFJR2
Z3 VDg1SIo80bB@j0V0VzS_@n1
R0
Z4 w1614731350
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_block.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_block.v
!i122 568
L0 19 332
Z5 OV;L;2020.1;71
r1
!s85 0
31
Z6 !s108 1640310440.000000
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_block.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_block.v|
!i113 1
Z7 o-work work
Z8 !s92 +define+SIM -work work
Z9 tCvgOpt 0
vactive_control_register
Z10 !s110 1640310439
!i10b 1
!s100 8:>1L?0EPC:OM=h56HE5S2
R2
IVz;HOF5IDN=ce4Ak@>k3K3
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_control_register.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_control_register.v
!i122 563
L0 12 87
R5
r1
!s85 0
31
Z11 !s108 1640310439.000000
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_control_register.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_control_register.v|
!i113 1
R7
R8
R9
vactive_serial_library
R10
!i10b 1
!s100 RPh<W9f?JgPXiRH0Vje`83
R2
IIB;3TEh;UCH]8nNmIESJ71
R3
R0
w1616094474
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_serial_library.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_serial_library.v
!i122 564
L0 37 164
R5
r1
!s85 0
31
R11
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_serial_library.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_serial_library.v|
!i113 1
R7
R8
R9
vactive_transfer
R1
!i10b 1
!s100 @j_IaA7UmLYSNcbbgGTLB1
R2
I:fVUm<kQU;;;4g>HA0ZIe1
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer.v
!i122 567
L0 13 285
R5
r1
!s85 0
31
R6
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer.v|
!i113 1
R7
R8
R9
vactive_transfer_uart
!s110 1638849241
!i10b 1
!s100 U?Me[SiNAi1cToz4z61f[3
R2
IAb;fCKh3d=eNEK<MdEdhF1
R3
R0
w1615961198
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer_uart.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer_uart.v
!i122 6
L0 33 502
R5
r1
!s85 0
31
!s108 1638849241.000000
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer_uart.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_transfer_uart.v|
!i113 1
R7
R9
vactive_trigger
R1
!i10b 1
!s100 ahz[T=0^?R0VKfnLX:n2Z0
R2
IU^P]_d<KP7iAH40_FEH]W3
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_trigger.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_trigger.v
!i122 566
L0 13 106
R5
r1
!s85 0
31
R11
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_trigger.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/active_trigger.v|
!i113 1
R7
R8
R9
vcounter_53
!s110 1638849264
!i10b 1
!s100 E_35z>?1[=V^RXcbWYXf>1
R2
IW]PXX^mohBFd0>ZB8eSVl0
R3
R0
R4
Z12 8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/serial_uart_comms_model.v
Z13 FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/serial_uart_comms_model.v
!i122 33
L0 580 10
R5
r1
!s85 0
31
!s108 1638849264.000000
Z14 !s107 ../Testbench/tb_define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/serial_uart_comms_model.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/serial_uart_comms_model.v|
!i113 1
R7
R9
vendpoint_registers
R1
!i10b 1
!s100 7GKLh3<je<NDfFMPK3oJ42
R2
ISAoB4oRIC8;k9N4KLf3P]0
R3
R0
w1616283291
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/endpoint_registers.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/endpoint_registers.v
!i122 570
L0 38 715
R5
r1
!s85 0
31
R6
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/endpoint_registers.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/endpoint_registers.v|
!i113 1
R7
R8
R9
vEPT_5M57_AP_U2_Top
R10
!i10b 1
!s100 kAz5XEPQ=7FC9RalSJVn^1
R2
IWR:cOz:VohR]G3=zZCG;e0
R3
R0
w1640310431
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/EPT_5M57_AP_U2_Top.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/EPT_5M57_AP_U2_Top.v
!i122 562
L0 38 628
R5
r1
!s85 0
31
R11
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/EPT_5M57_AP_U2_Top.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/EPT_5M57_AP_U2_Top.v|
!i113 1
R7
R8
R9
n@e@p@t_5@m57_@a@p_@u2_@top
veptWireOR
R10
!i10b 1
!s100 UaJTo1NoeWCN>z>QnFLV@1
R2
IlIdW^<VHM4@gU2;BHP@ee1
R3
R0
w1341557582
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/eptWireOR.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/eptWireOR.v
!i122 565
L0 32 14
R5
r1
!s85 0
31
R11
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/eptWireOR.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/eptWireOR.v|
!i113 1
R7
R8
R9
nept@wire@o@r
vfifo_4x16_model
Z15 !s110 1638849263
!i10b 1
!s100 l9RzhGh>bI66SDmAFPXgA2
R2
IF0<Z_XXMmJREW<Yl1@2F>3
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/fifo_4x16_model.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/fifo_4x16_model.v
!i122 26
L0 38 328
R5
r1
!s85 0
31
Z16 !s108 1638849263.000000
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/fifo_4x16_model.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/fifo_4x16_model.v|
!i113 1
R7
R9
vflipflop
Z17 !s110 1638849242
!i10b 1
!s100 KQF:E_R5;LHg^QW[fz]1G2
R2
IcQ1OY5E9R_TG5?:84HYo;2
R3
R0
w1373324110
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/flipflop.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/flipflop.v
!i122 11
L0 12 25
R5
r1
!s85 0
31
Z18 !s108 1638849242.000000
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/flipflop.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/flipflop.v|
!i113 1
R7
R9
vft_245_state_machine
R1
!i10b 1
!s100 36BdezLPb;GN7[iRM]B>83
R2
INN^]Jk;4Q]DWI_9V8H[JC2
R3
R0
w1616284432
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/ft_245_state_machine.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/ft_245_state_machine.v
!i122 569
L0 41 431
R5
r1
!s85 0
31
R6
!s107 ../src/define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/ft_245_state_machine.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/ft_245_state_machine.v|
!i113 1
R7
R8
R9
vhost_ft245_model
Z19 !s110 1640310441
!i10b 1
!s100 :R;k]XOc>4FnS60TE;DR10
R2
I^ijW?COS>9@S2^h6O_EgZ1
R3
R0
w1442294040
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model.v
!i122 578
L0 14 528
R5
r1
!s85 0
31
Z20 !s108 1640310441.000000
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model.v|
!i113 1
R7
R8
R9
vhost_ft245_model_read
R19
!i10b 1
!s100 GFW<NfW]JPP>TAh[AM=Gc3
R2
I]aWm0EgK7=Fc5azI@48zd3
R3
R0
w1340088422
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_read.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_read.v
!i122 579
L0 18 299
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_read.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_read.v|
!i113 1
R7
R8
R9
vhost_ft245_model_write
R19
!i10b 1
!s100 Ek5J`CG8F>a;?1ILI@C^k0
R2
I1H1@o9njzm;cFXWdQgBG90
R3
R0
w1341987916
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_write.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_write.v
!i122 580
L0 18 353
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_write.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_ft245_model_write.v|
!i113 1
R7
R8
R9
vhost_image_block_in
R15
!i10b 1
!s100 Ejk@4T`:X89RFKakUZ?_32
R2
IkHoIEONP_@_Zl2QmdEUh11
R3
R0
w1558739076
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_image_block_in.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_image_block_in.v
!i122 30
L0 28 173
R5
r1
!s85 0
31
R16
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_image_block_in.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/host_image_block_in.v|
!i113 1
R7
R9
vimage_block_in
R17
!i10b 1
!s100 MGh3V^DHBOUoTiSOfUAEl1
R2
I8oBQaDSQhFimjmccAne?V2
R3
R0
w1558769754
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_block_in.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_block_in.v
!i122 13
L0 28 64
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_block_in.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_block_in.v|
!i113 1
R7
R9
vimage_ept_logo
R17
!i10b 1
!s100 CmRg;Z?G4993Z^zNlXZQ]2
R2
ImTXk0DIhMLLdAe[J?Sf>01
R3
R0
w1554504186
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_ept_logo.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_ept_logo.v
!i122 14
L0 28 44
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_ept_logo.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_ept_logo.v|
!i113 1
R7
R9
vimage_face_1
R17
!i10b 1
!s100 Rz0oe=`LzoB_o^MM]iPLK1
R2
IdJFFj@]d:F?hNVK0KZzn72
R3
R0
w1554576240
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_face_1.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_face_1.v
!i122 15
L0 28 54
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_face_1.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/image_face_1.v|
!i113 1
R7
R9
vled_update
R17
!i10b 1
!s100 _l[fV0F^72dz=QjPIWPgj1
R2
IiX?GniOdSfUm[SN5BU_9d2
R3
R0
w1554482802
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/led_update.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/led_update.v
!i122 16
L0 28 227
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/led_update.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/led_update.v|
!i113 1
R7
R9
vlfsr
R17
!i10b 1
!s100 fZDzHG[:Z]^GEmkX4J?]33
R2
IiT_FShgZV[J=ifgMV5_E52
R3
R0
w1373350450
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/lfsr.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/lfsr.v
!i122 17
L0 12 29
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/lfsr.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/lfsr.v|
!i113 1
R7
R9
vmem_array
R19
!i10b 1
!s100 :hFU2zWNOGdG1]d0D@Q=A1
R2
I`96n:Z1PW:^nCQceGPbO12
R3
R0
w1328652312
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/mem_array.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/mem_array.v
!i122 581
L0 14 31
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/mem_array.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/mem_array.v|
!i113 1
R7
R8
R9
vmux
R17
!i10b 1
!s100 cfIo4h^n17Y<38i_4hcXS0
R2
Iz69fjie^5k545P@WDV?823
R3
R0
w1373323066
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/mux.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/mux.v
!i122 18
L0 12 21
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/mux.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/mux.v|
!i113 1
R7
R9
vread_control_logic
R19
!i10b 1
!s100 2bkeFNH6gb3PoaPH::Ven2
R2
IzE;1>XMi1PNVOEY;`l_X>1
R3
R0
w1331918130
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/read_control_logic.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/read_control_logic.v
!i122 582
L0 14 57
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/read_control_logic.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/read_control_logic.v|
!i113 1
R7
R8
R9
vserial_clock
R17
!i10b 1
!s100 5=E=U]G8Kj;c;VU__bYHA2
R2
I8F9La:VQAZW^bVT<2Om?[0
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/serial_clock.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/serial_clock.v
!i122 20
L0 30 49
R5
r1
!s85 0
31
R18
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/serial_clock.v|
!s90 -reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/serial_clock.v|
!i113 1
R7
R9
vserial_uart_comms_model
Z21 !s110 1640310442
!i10b 1
!s100 1<X0B;[hBfVfHEPh`dM2o3
R2
I6^jYEo<FLinY@6=oFgUZm1
R3
R0
R4
R12
R13
!i122 585
L0 40 536
R5
r1
!s85 0
31
Z22 !s108 1640310442.000000
R14
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/serial_uart_comms_model.v|
!i113 1
R7
R8
R9
vsync_fifo
R21
!i10b 1
!s100 4XVYIXkQJNZ9P`foKLHRV3
R2
ITf4>a?l[QB1`LL;_H75]H0
R3
R0
w1331919792
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/sync_fifo.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/sync_fifo.v
!i122 584
L0 12 82
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/sync_fifo.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/sync_fifo.v|
!i113 1
R7
R8
R9
vtb_ept_epm570_top
R21
!i10b 1
!s100 NaaaS7<kboF?^d9j4MWmO0
R2
Ib@cMM:BdJ@n8X<<LR[QWg0
R3
R0
w1639682786
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/Testbench/tb_ept_epm570_top.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/Testbench/tb_ept_epm570_top.v
!i122 590
L0 32 1928
R5
r1
!s85 0
31
R22
!s107 ../Testbench/tb_define.v|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/Testbench/tb_ept_epm570_top.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/Testbench/tb_ept_epm570_top.v|
!i113 1
R7
R8
R9
vuart_iface
R21
!i10b 1
!s100 Gh4X3;]TjR0EPU^n0GgF60
R2
I`mc6Ab;F@SOlzLL0G1@[70
R3
R0
Z23 w1614731351
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_iface.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_iface.v
!i122 586
L0 36 59
R5
r1
!s85 0
31
R22
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_iface.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_iface.v|
!i113 1
R7
R8
R9
vuart_receiver
R21
!i10b 1
!s100 CaEIJ[QP1QWC5ehWLdEYL1
R2
Ig645N6gP;oMh30LKMJVDC1
R3
R0
R23
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_receiver.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_receiver.v
!i122 587
L0 11 239
R5
r1
!s85 0
31
R22
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_receiver.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_receiver.v|
!i113 1
R7
R8
R9
vuart_top
R19
!i10b 1
!s100 =<3>;QbRd[3U=Z>_cEmUS2
R2
I1ITz;IlRKY?4?FR627f9`1
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_top.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_top.v
!i122 576
L0 24 57
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_top.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_top.v|
!i113 1
R7
R8
R9
vuart_transmitter
R19
!i10b 1
!s100 XDo:jUIJ1`66X5E33Ho:l2
R2
In_8KN]00e[>]z@8aV0ad13
R3
R0
R4
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_transmitter.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_transmitter.v
!i122 577
L0 22 180
R5
r1
!s85 0
31
R20
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_transmitter.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/src/uart_transmitter.v|
!i113 1
R7
R8
R9
vuart_transmitter_model
R21
!i10b 1
!s100 5[afZUQ]z0?WT5neSCX7b2
R2
IXlz;62h2;J0DHD6EdOYcg1
R3
R0
R23
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_transmitter_model.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_transmitter_model.v
!i122 588
L0 23 180
R5
r1
!s85 0
31
R22
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_transmitter_model.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/uart_transmitter_model.v|
!i113 1
R7
R8
R9
vwrite_control_logic
R21
!i10b 1
!s100 ZZfUVoPnGLV?1heZLf^lH2
R2
ITjM4DHYB:=E5F?gLj`if33
R3
R0
w1328652014
8C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/write_control_logic.v
FC:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/write_control_logic.v
!i122 589
L0 14 68
R5
r1
!s85 0
31
R22
!s107 C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/write_control_logic.v|
!s90 +define+SIM|-reportprogress|300|-work|work|C:/Jolly/Code_FPGA/EPT_5M57_AP_U2_Serial_Transfer/EPT_5M57_AP_U2_Serial_Transfer/test/write_control_logic.v|
!i113 1
R7
R8
R9
